| 1. 10. Playing with binary numbers.mp4 | 41 MB | ||
| 1. 10. Playing with binary numbers.srt | 14.6 KB | ||
| 1. 15. Introduction to Logic gates.mp4 | 24 MB | ||
| 1. 15. Introduction to Logic gates.srt | 5.4 KB | ||
| 1. 2. Types of Number Systems.mp4 | 27.9 MB | ||
| 1. 2. Types of Number Systems.srt | 7.8 KB | ||
| 1. 22. Minterms and SOP for circuit design.mp4 | 112.9 MB | ||
| 1. 22. Minterms and SOP for circuit design.srt | 26 KB | ||
| 1. 25. Karnaugh Maps for Gate Minimization.mp4 | 132.4 MB | ||
| 1. 25. Karnaugh Maps for Gate Minimization.srt | 27.6 KB | ||
| 1. 27. Classification of Logic Circuits.mp4 | 19.8 MB | ||
| 1. 27. Classification of Logic Circuits.srt | 4.2 KB | ||
| 1. 40. Basics of Sequential Logic Design.mp4 | 21 MB | ||
| 1. 40. Basics of Sequential Logic Design.srt | 5.1 KB | ||
| 1. Complete State Definition for a Sequence detector.mp4 | 121.9 MB | ||
| 1. Complete State Definition for a Sequence detector.srt | 23.3 KB | ||
| 1. Frequency Division using Flip Flops.mp4 | 67.6 MB | ||
| 1. Frequency Division using Flip Flops.srt | 13.9 KB | ||
| 1. Introduction.mp4 | 24.9 MB | ||
| 1. Introduction.srt | 7 KB | ||
| 1. Problem 1.mp4 | 34.6 MB | ||
| 1. Problem 1.srt | 9.2 KB | ||
| 1. Problem Sheet 1 with Solutions.html | 0 B | ||
| 1. Self Complementing code, 9's complement.mp4 | 46.2 MB | ||
| 1. Self Complementing code, 9's complement.srt | 12.2 KB | ||
| 1.1 Half adder and full adder.pdf | 716.1 KB | ||
| 1.1 PS1.pdf | 1.9 MB | ||
| 10. 36. Transmission of data using Encoder and Decoder circuits.mp4 | 66.7 MB | ||
| 10. 36. Transmission of data using Encoder and Decoder circuits.srt | 17.7 KB | ||
| 10. Final Outcome - Designing a Digital Logic Circuit (An Example).mp4 | 62.2 MB | ||
| 10. Final Outcome - Designing a Digital Logic Circuit (An Example).srt | 14 KB | ||
| 11. 37. All about Multiplexers.mp4 | 36 MB | ||
| 11. 37. All about Multiplexers.srt | 12.7 KB | ||
| 12. 38. Demultiplexers.mp4 | 13.9 MB | ||
| 12. 38. Demultiplexers.srt | 4 KB | ||
| 13. 39. Implementing any function using MUX - Crucial point of logic design.mp4 | 62.6 MB | ||
| 13. 39. Implementing any function using MUX - Crucial point of logic design.srt | 16.3 KB | ||
| 2. 11. Performing Arithmetic Operations on Binary Numbers.mp4 | 49.3 MB | ||
| 2. 11. Performing Arithmetic Operations on Binary Numbers.srt | 14.7 KB | ||
| 2. 16. AND, OR Gates.mp4 | 62.2 MB | ||
| 2. 16. AND, OR Gates.srt | 10.9 KB | ||
| 2. 23. Maxterms and POS.mp4 | 70.2 MB | ||
| 2. 23. Maxterms and POS.srt | 12.9 KB | ||
| 2. 26. Some problems on K Maps.mp4 | 63.9 MB | ||
| 2. 26. Some problems on K Maps.srt | 16.9 KB | ||
| 2. 28. Half Adder Design.mp4 | 27.6 MB | ||
| 2. 28. Half Adder Design.srt | 6.8 KB | ||
| 2. 3 Bit Magnitude Comparator - Notes.html | 0 B | ||
| 2. 3. Decimal to Binary Conversion.mp4 | 24.3 MB | ||
| 2. 3. Decimal to Binary Conversion.srt | 8.8 KB | ||
| 2. 41. Clock Signals and Triggering.mp4 | 27.1 MB | ||
| 2. 41. Clock Signals and Triggering.srt | 6.3 KB | ||
| 2. Consensus Theorem in Boolean Algebra.mp4 | 41.9 MB | ||
| 2. Consensus Theorem in Boolean Algebra.srt | 8.4 KB | ||
| 2. Problem 2.mp4 | 48.8 MB | ||
| 2. Problem 2.srt | 13.7 KB | ||
| 2. Problem Sheet 2 with Solutions.html | 0 B | ||
| 2. State Diagram of a Traffic Light Controller.mp4 | 26.2 MB | ||
| 2. State Diagram of a Traffic Light Controller.srt | 6.1 KB | ||
| 2.1 3 Bit Magnitude Comparator.pdf | 573.4 KB | ||
| 2.1 PS2.pdf | 2.7 MB | ||
| 3. 12. Binary Subtraction in a simple way.mp4 | 17.7 MB | ||
| 3. 12. Binary Subtraction in a simple way.srt | 4.1 KB | ||
| 3. 17. Let's analyse the three gates NOT NAND NOR.mp4 | 49.9 MB | ||
| 3. 17. Let's analyse the three gates NOT NAND NOR.srt | 11.9 KB | ||
| 3. 24. Represent any function in SOP and POS - Half way through the design.mp4 | 42.8 MB | ||
| 3. 24. Represent any function in SOP and POS - Half way through the design.srt | 7.5 KB | ||
| 3. 29. Designing a full adder using two half adders.mp4 | 39 MB | ||
| 3. 29. Designing a full adder using two half adders.srt | 9.2 KB | ||
| 3. 4. A Special Case in Conversion.mp4 | 55.7 MB | ||
| 3. 4. A Special Case in Conversion.srt | 11.2 KB | ||
| 3. 42. Working of Latches.mp4 | 78.7 MB | ||
| 3. 42. Working of Latches.srt | 13.9 KB | ||
| 3. Bubbled gates.mp4 | 33.9 MB | ||
| 3. Bubbled gates.srt | 9.2 KB | ||
| 3. Code Converters - Notes.html | 0 B | ||
| 3. Problem 3.mp4 | 54.6 MB | ||
| 3. Problem 3.srt | 14 KB | ||
| 3. Problem Sheet 3 with Solutions.html | 0 B | ||
| 3.1 Code Converters.pdf | 942.2 KB | ||
| 3.1 PS3.pdf | 3.8 MB | ||
| 4. 13. Ways to represent a signed number.mp4 | 30 MB | ||
| 4. 13. Ways to represent a signed number.srt | 7.6 KB | ||
| 4. 18. Beauty of EXOR Gate!.mp4 | 54 MB | ||
| 4. 18. Beauty of EXOR Gate!.srt | 12.2 KB | ||
| 4. 30. Gate Level Schematic for full adders.mp4 | 32.5 MB | ||
| 4. 30. Gate Level Schematic for full adders.srt | 6.8 KB | ||
| 4. 43. Flip Flops.mp4 | 170.6 MB | ||
| 4. 43. Flip Flops.srt | 44.7 KB | ||
| 4. 5. Decimal to Hexadecimal conversion.mp4 | 8 MB | ||
| 4. 5. Decimal to Hexadecimal conversion.srt | 3.8 KB | ||
| 4. Problem 4.mp4 | 23.3 MB | ||
| 4. Problem 4.srt | 5.1 KB | ||
| 4. Why NAND and NOR are universal gates.mp4 | 32.3 MB | ||
| 4. Why NAND and NOR are universal gates.srt | 8.3 KB | ||
| 5. 14. 2's complement.mp4 | 24.8 MB | ||
| 5. 14. 2's complement.srt | 7.3 KB | ||
| 5. 19.9 Important Laws on Boolean Algebra for Logic Design.mp4 | 49.9 MB | ||
| 5. 19.9 Important Laws on Boolean Algebra for Logic Design.srt | 12.4 KB | ||
| 5. 31. Designing 4 bit Parallel Adders using full adders.mp4 | 46.2 MB | ||
| 5. 31. Designing 4 bit Parallel Adders using full adders.srt | 11.3 KB | ||
| 5. 6. Decimal to Octal.mp4 | 16.7 MB | ||
| 5. 6. Decimal to Octal.srt | 5.1 KB | ||
| 5. Introduction to Counters.mp4 | 18.8 MB | ||
| 5. Introduction to Counters.srt | 5.7 KB | ||
| 5. Problem 5.mp4 | 20.3 MB | ||
| 5. Problem 5.srt | 5.2 KB | ||
| 6. 20. De Morgan's Laws.mp4 | 15.7 MB | ||
| 6. 20. De Morgan's Laws.srt | 4.1 KB | ||
| 6. 32. An intuition on Propagation Delay.mp4 | 18 MB | ||
| 6. 32. An intuition on Propagation Delay.srt | 4.8 KB | ||
| 6. 7. Binary to Decimal Conversion!.mp4 | 23.7 MB | ||
| 6. 7. Binary to Decimal Conversion!.srt | 8.1 KB | ||
| 6. Designing Asynchronous Counters.mp4 | 129.3 MB | ||
| 6. Designing Asynchronous Counters.srt | 28.8 KB | ||
| 6. Problem 6.mp4 | 17.3 MB | ||
| 6. Problem 6.srt | 5.8 KB | ||
| 7. 21. Let's solve some problems on Boolean Algebra.mp4 | 32.4 MB | ||
| 7. 21. Let's solve some problems on Boolean Algebra.srt | 7.3 KB | ||
| 7. 33. Design Steps for Carry look ahead adder.mp4 | 60.9 MB | ||
| 7. 33. Design Steps for Carry look ahead adder.srt | 12.2 KB | ||
| 7. 8. Converting hex numbers to decimal number.mp4 | 13.4 MB | ||
| 7. 8. Converting hex numbers to decimal number.srt | 3.2 KB | ||
| 7. Designing counter to count any number.mp4 | 41.3 MB | ||
| 7. Designing counter to count any number.srt | 9.1 KB | ||
| 7. Problem 7.mp4 | 24.3 MB | ||
| 7. Problem 7.srt | 7.2 KB | ||
| 8. 34. Different Codes and Code Converter Circuit.mp4 | 53.1 MB | ||
| 8. 34. Different Codes and Code Converter Circuit.srt | 11 KB | ||
| 8. 9. Binary to hex conversion.mp4 | 12.2 MB | ||
| 8. 9. Binary to hex conversion.srt | 3.3 KB | ||
| 8. Ring Counter and Shift Registers.mp4 | 51.8 MB | ||
| 8. Ring Counter and Shift Registers.srt | 13.5 KB | ||
| 9. 35. Designing a BCD to Gray Code Converter {Full Design}.mp4 | 113.6 MB | ||
| 9. 35. Designing a BCD to Gray Code Converter {Full Design}.srt | 21.8 KB | ||
| 9. Johnson's or Twisted Ring Counter Design.mp4 | 65 MB | ||
| 9. Johnson's or Twisted Ring Counter Design.srt | 13.6 KB | ||
| Bonus Resources.txt | 409.6 B | ||
| Get Bonus Downloads Here.url | 204.8 B | ||
| ▲ 139 total files | |||
Digital Logic Circuits and Design by Sujithkumar MA
https://DevCourseWeb.com
Last updated 12/2022
Created by Sujithkumar MA
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English + srt | Duration: 69 Lectures ( 9h 5m ) | Size: 2.87 GB
Learn how to design a digital circuit in the simplest way in the world of digital electronics
What you'll learn
Digital Electronics
Digital Circuit Design
Digital Logic Design
Requirements
No, There are no pre requisites.
| torrent name | size | uploader | age | seed | leech |
|---|---|---|---|---|---|
| 2 GB | freecoursewb | 1 week | 18 | 13 | |
| 267.9 MB | freecoursewb | 1 week | 0 | 0 | |
| 2.8 GB | freecoursewb | 1 month | 14 | 9 | |
| 289.4 MB | freecoursewb | 1 month | 11 | 1 | |
| 1.2 GB | freecoursewb | 2 months | 13 | 6 |
All Comments