Udemy - The Complete Course of Static Timing Analysis STA 2023

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Udemy - The Complete Course of Static Timing Analysis STA 2023 (Size: 1.8 GB)
  1. About This Course.mp4 10.6 MB
  1. Clocks.mp4 130.3 MB
  1. Introduction to SDC Constraints Part I.mp4 194.5 MB
  1. Opensource Tool Installation.mp4 109.6 MB
  1. Timing Checks.mp4 121.3 MB
  1. Understanding Cell Delay.mp4 61 MB
  1. Understanding Timing Paths.mp4 102.9 MB
  2. Example 3 Clocks demonstration.mp4 40 MB
  2. Example 4 Timing checks.mp4 36.2 MB
  2. Introduction to SDC Constraints Part II.mp4 187.1 MB
  2. Introduction to Static Timing Analysis.mp4 60.9 MB
  2. Net Delay.mp4 118.6 MB
  2. Opensource Tool OpenTimer project.mp4 179.1 MB
  3. Example 1 Library File Components.mp4 102.6 MB
  3. Example 2 Cell Delay and Net delay.mp4 45.4 MB
  3. Example 5 SDC Constraints.mp4 197.5 MB
  4. Setting Timing Constraints.mp4 186.5 MB
  Bonus Resources.txt 409.6 B
  Get Bonus Downloads Here.url 204.8 B
  ▲ 19 total files

Description


The Complete Course of Static Timing Analysis STA 2023

https://CourseWikia.com

Published 10/2023
Created by Teresa Gual
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English | Duration: 17 Lectures ( 5h 41m ) | Size: 1.83 GB

Become an expert in Static Timing Analysis. Learn VLSI Design in a Professional way from scratch!

What you'll learn
At the end of the course you will fully master Static Timing Analysis, to be able to conduct your own physical design and electronics projects
You will be able to build step by step your digital circuit designs, understanding all the logic and ending with advanced practical examples and projects
You will become familiar with the work environment, essential commands, and you will master all the phases of the setting
You will fully understand the Cell Delay and Net Delay, with theoretical and practical explanations
You will learn in a professional way how to use Clocks: Clock period, Pulse width, Duty cycle, Clock slew or clock transition, Clock uncertainty, Clock latency
You will master the use of Timing Checks and Timing Paths
You will learn the use of SDC Constraints, and you will completely control the Setting Timing Constraints, and above all, understanding their interpretation
You will master OpenTimer software (opensource tool), practicing with hands-on projects
You will be able to practice the content learned in a practical way by following all the steps in the complete exercises and the course projects
You will start with the basics and progressively carry out more complex steps until you reach an advanced level and absolute mastery at the end of the course

Requirements
Basic knowledge of digital circuit design, VLSI or Electronics can help, but the course starts from scratch
Download and install needed software and tools (if you don't know how, don't worry, it's very easy, free and I'll explain it to you in the course!)
A decent computer and of course, desire to learn!

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