| 1 -Understanding MTBF & Improving strategies P1.mp4 | 16 MB | ||
| 1 -What is CDC.mp4 | 12.1 MB | ||
| 1 -Why combinational output should not be used as input to synchronizer P1.mp4 | 34.8 MB | ||
| 1 -Why single bit CDC cannot be used for Multibits.mp4 | 17.3 MB | ||
| 1 -ways to build Synchronizer P1.mp4 | 13.6 MB | ||
| 10 - Code.html | 3 KB | ||
| 10 - Constraints.html | 921.6 B | ||
| 10 - Design Code.html | 819.2 B | ||
| 10 - Why STA (Static Timing Analysis) is performed only on synchronous clock domains.html | 819.2 B | ||
| 10 -Clock Interaction report P3.mp4 | 23.1 MB | ||
| 10 -Counter Crossing Manual Approach P1.mp4 | 6.9 MB | ||
| 10 -Recommended Practices for CDC Flops P1 Low Fanout.mp4 | 12.8 MB | ||
| 10 -Understanding xpm_cdc_single.mp4 | 28.3 MB | ||
| 11 -Counter Crossing Manual Approach P2.mp4 | 21.8 MB | ||
| 11 -False Violations.mp4 | 41.1 MB | ||
| 11 -Recommended Practices for CDC Flops P2 Minimize delay.mp4 | 4.8 MB | ||
| 11 -xpm_cdc_single used case P1.mp4 | 21.9 MB | ||
| 12 -CDC flow P1.mp4 | 8.9 MB | ||
| 12 -Counter Crossing Manual Approach P3.mp4 | 10.1 MB | ||
| 12 -Understanding Setup & hold times P1.mp4 | 6.9 MB | ||
| 12 -xpm_cdc_single used case P2.mp4 | 38 MB | ||
| 13 - Code.html | 3 KB | ||
| 13 -CDC flow P2.mp4 | 10.8 MB | ||
| 13 -Counter Crossing Manual Approach P4.mp4 | 15.5 MB | ||
| 13 -Understanding Setup & hold times P2.mp4 | 13.2 MB | ||
| 13 -Understanding xpm_cdc_pulse P1.mp4 | 16.5 MB | ||
| 14 -Clock Interaction report P4.mp4 | 24.7 MB | ||
| 14 -Counter Crossing Manual Approach P5.mp4 | 20.9 MB | ||
| 14 -Understanding xpm_cdc_pulse P2.mp4 | 13.7 MB | ||
| 14 -Using Primitives in CDC flow P1.mp4 | 24.9 MB | ||
| 15 -Counter Crossing Manual Approach P6.mp4 | 6.5 MB | ||
| 15 -Understanding xpm_cdc_pulse P3.mp4 | 9.1 MB | ||
| 15 -Use of Clock interaction report P1.mp4 | 18.6 MB | ||
| 15 -Using Primitives in CDC flow P2.mp4 | 30.8 MB | ||
| 16 -Counter Crossing Manual Approach P7.mp4 | 32.9 MB | ||
| 16 -Understanding xpm_cdc_pulse P4.mp4 | 6.9 MB | ||
| 16 -Use of Clock interaction report P2.mp4 | 5.2 MB | ||
| 16 -Using Primitives in CDC flow P3.mp4 | 12.9 MB | ||
| 17 - Code.html | 2.8 KB | ||
| 17 - Constraints.html | 409.6 B | ||
| 17 - Design Code.html | 921.6 B | ||
| 17 - Interview Prep.html | 1.5 KB | ||
| 17 - Usage of report_clock_interaction.html | 307.2 B | ||
| 17 -Understanding XPM_CDC_GRAY P1.mp4 | 19.5 MB | ||
| 17 -Understanding xpm_cdc_pulse P5.mp4 | 15.7 MB | ||
| 17 -report_cdc P1.mp4 | 20.8 MB | ||
| 18 - Code.html | 6.8 KB | ||
| 18 - Interview Prep.html | 1.2 KB | ||
| 18 - Self Check Exercise 1.html | 1 KB | ||
| 18 - Self Check Exercise 2.html | 1.1 KB | ||
| 18 - Self Check Exercise 3.html | 1.2 KB | ||
| 18 - Self Check Exercise 4.html | 1.1 KB | ||
| 18 -Understanding XPM_CDC_GRAY P2.mp4 | 23.2 MB | ||
| 18 -Usage of report cdc.mp4 | 12.1 MB | ||
| 19 -Safe & Unsafe terminology.mp4 | 14.8 MB | ||
| 19 -Simple example of primitive P1.mp4 | 15.2 MB | ||
| 2 - STA vs CDC.html | 921.6 B | ||
| 2 -Multi-bit Decision Tree P1.mp4 | 11.9 MB | ||
| 2 -Understanding MTBF & Improving strategies P2.mp4 | 16.9 MB | ||
| 2 -Understanding Metastability P1.mp4 | 17.1 MB | ||
| 2 -Why combinational output should not be used as input to synchronizer P2.mp4 | 27.9 MB | ||
| 2 -ways to build Synchronizer P2.mp4 | 18.6 MB | ||
| 20 -Simple example of primitive P2.mp4 | 18.3 MB | ||
| 20 -Understanding report_cdc P1.mp4 | 6.4 MB | ||
| 21 -Simple example of primitive P3.mp4 | 12.3 MB | ||
| 21 -Understanding report_cdc P2.mp4 | 23.8 MB | ||
| 22 - Code.html | 2.1 KB | ||
| 22 -Understanding report_cdc P3.mp4 | 33.6 MB | ||
| 22 -Using CDC GRAY primitives in FIFO P1.mp4 | 18.8 MB | ||
| 23 -Understanding report_cdc info P1.mp4 | 28.7 MB | ||
| 23 -Using CDC GRAY primitives in FIFO P2.mp4 | 13.6 MB | ||
| 24 -Understanding report_cdc info P2.mp4 | 22.9 MB | ||
| 24 -Using CDC GRAY primitives in FIFO P3.mp4 | 21.6 MB | ||
| 25 - Code.html | 3.2 KB | ||
| 25 -Understanding report_cdc info P3.mp4 | 23.9 MB | ||
| 25 -Used Case P1.mp4 | 20.2 MB | ||
| 26 -Understanding report_cdc info P4.mp4 | 28.9 MB | ||
| 26 -Used Case P2.mp4 | 16.2 MB | ||
| 27 - Code.html | 1.3 KB | ||
| 27 - Interview Prep.html | 1.5 KB | ||
| 27 - Self Checking exercise.html | 1.1 KB | ||
| 27 - Usage of report_cdc.html | 307.2 B | ||
| 27 -Understanding xpm_fifo_async P1.mp4 | 17.5 MB | ||
| 28 -Understanding xpm_fifo_async P2.mp4 | 26 MB | ||
| 29 -Understanding xpm_fifo_async P3.mp4 | 14.5 MB | ||
| 3 -Multi-bit Decision Tree P2.mp4 | 11.5 MB | ||
| 3 -Single Bit Decision Tree.mp4 | 13.5 MB | ||
| 3 -Understanding MTBF & Improving strategies P3.mp4 | 27.7 MB | ||
| 3 -Understanding Metastability P2.mp4 | 13.6 MB | ||
| 3 -Why combinational output should not be used as input to synchronizer P3.mp4 | 15.9 MB | ||
| 30 - Self Checking exercise.html | 1.2 KB | ||
| 30 -Understanding XPM_CDC_HANDSHAKE P1.mp4 | 25.6 MB | ||
| 31 -Understanding XPM_CDC_HANDSHAKE P2.mp4 | 29.7 MB | ||
| 32 -Understanding XPM_CDC_HANDSHAKE P3.mp4 | 29.5 MB | ||
| 33 -Understanding XPM_CDC_HANDSHAKE P4.mp4 | 10.5 MB | ||
| 34 -Understanding XPM_CDC_HANDSHAKE P5.mp4 | 19.7 MB | ||
| 35 - Interview Prep.html | 1.9 KB | ||
| 35 - Self Checking exercise.html | 2.2 KB | ||
| 4 - Constraints.html | 409.6 B | ||
| 4 - Design Code.html | 819.2 B | ||
| 4 - Interview Prep.html | 921.6 B | ||
| 4 -Async Reset P1.mp4 | 14.1 MB | ||
| 4 -Effects of Metastability.mp4 | 15.2 MB | ||
| 4 -Revisiting bad circuit.mp4 | 23.1 MB | ||
| 4 -Understanding XPM_CDC_ARRAY_SINGLE P1.mp4 | 23.1 MB | ||
| 5 -Async Reset P2.mp4 | 14.5 MB | ||
| 5 -Revisiting Metastability.mp4 | 15.3 MB | ||
| 5 -Synchronizer.mp4 | 37.9 MB | ||
| 5 -Understanding XPM_CDC_ARRAY_SINGLE P2.mp4 | 24.3 MB | ||
| 6 -Adding Synchronizer to design P1.mp4 | 18.3 MB | ||
| 6 -Async Reset P3.mp4 | 36.9 MB | ||
| 6 -Demonstration P1.mp4 | 10.9 MB | ||
| 6 -Understanding XPM_CDC_ARRAY_SINGLE P3.mp4 | 22.7 MB | ||
| 7 - Code.html | 1.7 KB | ||
| 7 -Adding Synchronizer to design P2.mp4 | 18 MB | ||
| 7 -Data Incoherency.mp4 | 13.6 MB | ||
| 7 -Demonstration P2.mp4 | 27.9 MB | ||
| 7 -Sync Reset P1.mp4 | 19.4 MB | ||
| 8 - Constraints.html | 409.6 B | ||
| 8 - Design Code.html | 819.2 B | ||
| 8 - Sync vs Async domains.html | 921.6 B | ||
| 8 -Advantages of Gray over binary counters.mp4 | 6.5 MB | ||
| 8 -Clock Interaction report P1.mp4 | 23.9 MB | ||
| 8 -Sync Reset P2.mp4 | 23.7 MB | ||
| 8 -Usage of ASYNC_REG attributes P1.mp4 | 40.3 MB | ||
| 9 -Binary vs Gray Counters.mp4 | 6.9 MB | ||
| 9 -Clock Interaction report P2.mp4 | 25.9 MB | ||
| 9 -Sync Reset P3.mp4 | 25.1 MB | ||
| 9 -Usage of ASYNC_REG attributes P2.mp4 | 20.9 MB | ||
| Bonus Resources.txt | 102.4 B | ||
| Get Bonus Downloads Here.url | 204.8 B | ||
| ▲ 134 total files | |||
FPGA Timings P2: Clock Domain Crossing(CDC) with Vivado 2024
https://WebToolTip.com
Published 7/2025
Created by Kumar Khandagle
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Level: Beginner | Genre: eLearning | Language: English | Duration: 133 Lectures ( 5h 8m ) | Size: 1.8 GB
Step by Step Guide from Scratch
What you'll learn
Metastability physics and its impact on clock-domain crossings.
Distinction between Static Timing Analysis and CDC verification in Vivado 2024.
Generation and interpretation of Vivado report_clock_interaction and report_cdc outputs.
Design and insertion of two- and three-stage synchronizers with correct ASYNC_REG usage.
Decision-tree methods for safe single-bit transfers, pulses, and reset crossings.
Techniques for coherent multi-bit transfers using Gray counters and XPM_CDC primitives.
Calculation and optimization of Mean Time Between Failure (MTBF) for reliable designs.
Requirements
Fundamentals of Digital Electronics, Verilog, STA.
| torrent name | size | uploader | age | seed | leech |
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Udemy - Digital IC - FPGA Design P3 - Common Used Hardware Architectures Posted by
freecoursewb in Other
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