| 1. Clock Generator for different Baud.mp4 | 25.8 MB | ||
| 1. Clock Generator for different Baud.srt | 8.1 KB | ||
| 1. Course Overview.mp4 | 8.7 MB | ||
| 1. Course Overview.srt | 2.6 KB | ||
| 1. DFF P1.mp4 | 6.1 MB | ||
| 1. DFF P1.srt | 2.5 KB | ||
| 1. Fundamentals.mp4 | 29.7 MB | ||
| 1. Fundamentals.srt | 9 KB | ||
| 1. Multiplier P1.mp4 | 7.6 MB | ||
| 1. Multiplier P1.srt | 3.7 KB | ||
| 1. Sequence Library P1.mp4 | 51.6 MB | ||
| 1. Sequence Library P1.srt | 11.6 KB | ||
| 1. Understanding AXI Channels.mp4 | 13.9 MB | ||
| 1. Understanding AXI Channels.srt | 5.4 KB | ||
| 1. Understanding I2C.mp4 | 34.2 MB | ||
| 1. Understanding I2C.srt | 8.7 KB | ||
| 1. Understanding SPI Controller RTL.mp4 | 75.9 MB | ||
| 1. Understanding SPI Controller RTL.srt | 20.2 KB | ||
| 1. Understanding TLM FIFO usage.mp4 | 11.9 MB | ||
| 1. Understanding TLM FIFO usage.srt | 4.2 KB | ||
| 1. Virtual Sequencer P1.mp4 | 7.7 MB | ||
| 1. Virtual Sequencer P1.srt | 1.5 KB | ||
| 10. Implementing Write Data Channel.mp4 | 29.8 MB | ||
| 10. Implementing Write Data Channel.srt | 7.4 KB | ||
| 10. Native SPI P2.mp4 | 19.9 MB | ||
| 10. Native SPI P2.srt | 2.2 KB | ||
| 10. System Top.mp4 | 8.2 MB | ||
| 10. System Top.srt | 2.6 KB | ||
| 11. Design Code Native.html | 3.5 KB | ||
| 11. Implementing Write Response Channel.mp4 | 9.6 MB | ||
| 11. Implementing Write Response Channel.srt | 2.7 KB | ||
| 11. Typical Transaction.mp4 | 23.8 MB | ||
| 11. Typical Transaction.srt | 6 KB | ||
| 12. Read Channel.mp4 | 46.9 MB | ||
| 12. Read Channel.srt | 9.5 KB | ||
| 12. Simple TB code.html | 716.8 B | ||
| 12. Verification Environment Native.html | 13.7 KB | ||
| 13. Implementing Read Channel.mp4 | 65.7 MB | ||
| 13. Implementing Read Channel.srt | 15.4 KB | ||
| 13. Verification Environment P1.mp4 | 122.9 MB | ||
| 13. Verification Environment P1.srt | 25.1 KB | ||
| 14. Verification Environment P1.mp4 | 132.2 MB | ||
| 14. Verification Environment P1.srt | 28.2 KB | ||
| 14. Verification Environment P2.mp4 | 67.7 MB | ||
| 14. Verification Environment P2.srt | 8.8 KB | ||
| 15. Design Code.html | 14.1 KB | ||
| 15. Verification Environment P2.mp4 | 61.9 MB | ||
| 15. Verification Environment P2.srt | 11.4 KB | ||
| 16. Verification Environment P3.mp4 | 50.7 MB | ||
| 16. Verification Environment P3.srt | 7.5 KB | ||
| 16. Verification Environment.html | 17.7 KB | ||
| 17. Design Code.html | 30.7 KB | ||
| 18. Verification Environment.html | 22.7 KB | ||
| 2. DFF P1.mp4 | 102.2 MB | ||
| 2. DFF P1.srt | 23.2 KB | ||
| 2. Demonstration.mp4 | 69.6 MB | ||
| 2. Demonstration.srt | 10.8 KB | ||
| 2. I2C Slave Memory.mp4 | 26.8 MB | ||
| 2. I2C Slave Memory.srt | 6.2 KB | ||
| 2. Multiplier P2.mp4 | 69.8 MB | ||
| 2. Multiplier P2.srt | 16.5 KB | ||
| 2. Sequence Library P2.mp4 | 67 MB | ||
| 2. Sequence Library P2.srt | 11.1 KB | ||
| 2. Understanding Design.mp4 | 42.9 MB | ||
| 2. Understanding Design.srt | 10.3 KB | ||
| 2. Understanding SPI Memory.mp4 | 32.3 MB | ||
| 2. Understanding SPI Memory.srt | 8 KB | ||
| 2. Verification P1.mp4 | 80.2 MB | ||
| 2. Verification P1.srt | 19.2 KB | ||
| 2. Virtual Sequencer P2.mp4 | 29.2 MB | ||
| 2. Virtual Sequencer P2.srt | 5 KB | ||
| 2. Write address Channel.mp4 | 61.1 MB | ||
| 2. Write address Channel.srt | 16.3 KB | ||
| 3. Code.html | 4.2 KB | ||
| 3. DFF P3.mp4 | 50.6 MB | ||
| 3. DFF P3.srt | 10.4 KB | ||
| 3. DUT.mp4 | 8.3 MB | ||
| 3. DUT.srt | 1.5 KB | ||
| 3. I2C Master Controller.mp4 | 26 MB | ||
| 3. I2C Master Controller.srt | 5.6 KB | ||
| 3. Multiplier P3.mp4 | 52.2 MB | ||
| 3. Multiplier P3.srt | 10.7 KB | ||
| 3. Typical Transactions.mp4 | 25.6 MB | ||
| 3. Typical Transactions.srt | 3.9 KB | ||
| 3. Understanding Transactions.mp4 | 34.6 MB | ||
| 3. Understanding Transactions.srt | 9.3 KB | ||
| 3. Verification P2.mp4 | 22.3 MB | ||
| 3. Verification P2.srt | 2.9 KB | ||
| 3. Write Data Channel.mp4 | 15.8 MB | ||
| 3. Write Data Channel.srt | 3.6 KB | ||
| 4. ABP_RAM P1.mp4 | 68.4 MB | ||
| 4. ABP_RAM P1.srt | 17.2 KB | ||
| 4. Clock Generator Design.html | 1.3 KB | ||
| 4. Design Code.html | 409.6 B | ||
| 4. SPI controller P1.mp4 | 133.2 MB | ||
| 4. SPI controller P1.srt | 30.2 KB | ||
| 4. Typical Transaction to DUT.mp4 | 10.4 MB | ||
| 4. Typical Transaction to DUT.srt | 1.8 KB | ||
| 4. Usage of TLM Analysis FIFO P1 Design.mp4 | 5.6 MB | ||
| 4. Usage of TLM Analysis FIFO P1 Design.srt | 1.9 KB | ||
| 4. Verification Environment P1.mp4 | 57.7 MB | ||
| 4. Verification Environment P1.srt | 9 KB | ||
| 4. Write Response Channel.mp4 | 8.1 MB | ||
| 4. Write Response Channel.srt | 2.3 KB | ||
| 5. ABP_RAM P2.mp4 | 107.6 MB | ||
| 5. ABP_RAM P2.srt | 23.9 KB | ||
| 5. Clock Generator Verification environment.html | 8.3 KB | ||
| 5. SPI controller P2.mp4 | 43.9 MB | ||
| 5. SPI controller P2.srt | 6.6 KB | ||
| 5. Single Write Transaction.mp4 | 23.8 MB | ||
| 5. Single Write Transaction.srt | 5.2 KB | ||
| 5. Usage of TLM Analysis FIFO P1 Verification Env P1.mp4 | 3.9 MB | ||
| 5. Usage of TLM Analysis FIFO P1 Verification Env P1.srt | 1.4 KB | ||
| 5. Verification Code.html | 8.2 KB | ||
| 5. Verification Environment P1.mp4 | 59.4 MB | ||
| 5. Verification Environment P1.srt | 13.4 KB | ||
| 5. Verification Environment P2.mp4 | 36 MB | ||
| 5. Verification Environment P2.srt | 5.4 KB | ||
| 5. Verification Environment.html | 5.7 KB | ||
| 6. ABP_RAM P3.mp4 | 44.4 MB | ||
| 6. ABP_RAM P3.srt | 5.4 KB | ||
| 6. Design Code.html | 7.8 KB | ||
| 6. Implementing Write Channel P1.mp4 | 40.7 MB | ||
| 6. Implementing Write Channel P1.srt | 9.8 KB | ||
| 6. Understanding UART system.mp4 | 40.9 MB | ||
| 6. Understanding UART system.srt | 8.6 KB | ||
| 6. Usage of TLM Analysis FIFO P1 Verification Env P2.mp4 | 59.3 MB | ||
| 6. Usage of TLM Analysis FIFO P1 Verification Env P2.srt | 12.5 KB | ||
| 6. Verification Environment P2.mp4 | 40.7 MB | ||
| 6. Verification Environment P2.srt | 5.3 KB | ||
| 6. Verification Environment P3.mp4 | 49.8 MB | ||
| 6. Verification Environment P3.srt | 8.2 KB | ||
| 7. Design Code.html | 2.7 KB | ||
| 7. UART Clock Generator.mp4 | 20.5 MB | ||
| 7. UART Clock Generator.srt | 5.6 KB | ||
| 7. Understanding Burst Type P1.mp4 | 46.7 MB | ||
| 7. Understanding Burst Type P1.srt | 11.3 KB | ||
| 7. Usage of TLM Analysis FIFO P1 Verification Env P3.mp4 | 29.7 MB | ||
| 7. Usage of TLM Analysis FIFO P1 Verification Env P3.srt | 4.3 KB | ||
| 7. Verification Environment.html | 13.7 KB | ||
| 8. Design Code.html | 409.6 B | ||
| 8. UART Transmitter.mp4 | 52.7 MB | ||
| 8. UART Transmitter.srt | 12.4 KB | ||
| 8. Understanding Burst Type P2.mp4 | 26.1 MB | ||
| 8. Understanding Burst Type P2.srt | 5.1 KB | ||
| 8. Understanding Native Transactions.mp4 | 31.3 MB | ||
| 8. Understanding Native Transactions.srt | 7 KB | ||
| 8. Verification Environment.html | 17 KB | ||
| 9. Native SPI P1.mp4 | 74.5 MB | ||
| 9. Native SPI P1.srt | 15.9 KB | ||
| 9. UART Receiver.mp4 | 60.7 MB | ||
| 9. UART Receiver.srt | 14.7 KB | ||
| 9. Understanding Burst Type P3.mp4 | 69.1 MB | ||
| 9. Understanding Burst Type P3.srt | 15.6 KB | ||
| 9. Verification Environment.html | 7.9 KB | ||
| Bonus Resources.txt | 409.6 B | ||
| Get Bonus Downloads Here.url | 204.8 B | ||
| ▲ 163 total files | |||
UVM for Verification Part 2 : Projects
https://DevCourseWeb.com
Last updated 12/2022
Created by Kumar Khandagle
MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English + srt | Duration: 93 Lectures ( 8h 41m ) | Size: 2.9 GB
Using UVM for verification of most common RTLs
What you'll learn
Verification of Combinational Circuits
Verification of Sequential Circuits
Verification of Common Bus Protocols viz. APB, AXI
Verification of Communication Protocols viz. UART, SPI, I2C
Understanding usage of Virtual Sequencer, Sequence Library and TLM analysis FIFO
Requirements
Fundamentals of UVM
| torrent name | size | uploader | age | seed | leech |
|---|---|---|---|---|---|
|
Udemy - UVM for Verification Part 3 - Register Abstraction Layer (RAL) Posted by
freecoursewb in Other
|
2.6 GB | freecoursewb | 3 years | 0 | 0 |
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